Line monitoring of negative bias temperature instabilities by hole injection methods
US6521469B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 25, 2000 |
| Grant date | Feb 18, 2003 |
| Priority date | — |
| Expiry date | May 22, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for in-line testing of a metal-oxide-semiconductor field effect transistor (MOSFET) device for negative bias thermal instability (NBTI), which degrades the gate oxide of the MOSFET device. The process generally comprises four steps. First, a hole injection method is selected that produces approximately the same gate oxide degradation as the NBTI under test. Second, a correlation is established between the NBTI degradation and device shifts due to the selected hole injection degradation method. Third, an in-line procedure is developed based on the hole injection method, using the second step to relate the measured shift to NBTI. Finally, a NBTI specification is defined based on the hole injection method using the second step. The MOSFET device is preferably a p-type MOSFET device and the hole injection method is preferably a channel hot-carrier stress method.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.