Semiconductor device using a barrier layer between the gate electrode and substrate and method therefor
US6521961B1 · kind B1 · utility
43Cited by
20References
6Claims
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Key dates
| Filing date | Apr 28, 2000 |
| Grant date | Feb 18, 2003 |
| Priority date | — |
| Expiry date | Apr 28, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/64
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An enhancement mode semiconductor device has a barrier layer disposed between the gate electrode of the device and the semiconductor substrate underlying the gate electrode. The barrier layer increases the Schottky barrier height of the gate electrode-barrier layer-substrate interface so that the portion of the substrate underlying the gate electrode operates in an enhancement mode. The barrier layer is particularly useful ill compound semiconductor field effect transistors, and preferred materials for the barrier layer include aluminum gallium arsenide and indium gallium arsenide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.