Method of processing wafers and other planar articles within a processing cell
US6524463B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 16, 2001 |
| Grant date | Feb 25, 2003 |
| Priority date | — |
| Expiry date | Jul 16, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/68764
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of processing wafers or other articles within a processing cell, entailing transporting a carrier supporting a vertically-oriented wafer horizontally through an inlet opening of a process cell, processing the vertically-oriented wafer within the process cell, and then transporting the carrier out of the process cell horizontally through an outlet opening of the process cell. In one exemplary implementation, the process performed within the cell is a pre-or post- treatment where the wafer is subjected to an acid solution treatment and/or a rinsing with de-ionized water treatment. In another exemplary implementation, the process performed within the process cell is an electroplating of the plating surface of the wafer. Additionally, a method of processing an empty carrier entailing transporting the carrier horizontally through an inlet opening of a process cell, processing the carrier within the process cell, and transporting the carrier out of the process cell horizontally through an outlet opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.