Molded integrated circuit package
US6525421B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 1, 2001 |
| Grant date | Feb 25, 2003 |
| Priority date | — |
| Expiry date | May 1, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S425/044
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A mold for use in encapsulating an integrated circuit, wherein an encapsulant is injected into the mold during packaging of the integrated circuit. The improvement to the mold is a shaped member having an abutting surface for contacting a surface of the integrated circuit and thereby substantially preventing encapsulant from adhering to the surface of the integrated circuit, whereby the surface of the integrated circuit is left exposed. Because the surface of the integrated circuit is left exposed, the encapsulant used to encapsulate the integrated circuit does not form a thermal barrier between the integrated circuit and the exterior of the package. Thus, the packaged integrated circuit is able to more efficiently conduct heat away from the integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.