Method of operating a solid state power amplifying device
US6529081B1 · kind B1 · utility
2Cited by
27References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 8, 2000 |
| Grant date | Mar 4, 2003 |
| Priority date | — |
| Expiry date | Jun 8, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2223/6655
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a circuit is disclosed. The circuit comprises a solid state power amplifying device, an input impedance matching circuit and an output impedance matching circuit coupled to the solid state amplifying device. The input impedance matching circuit includes an input pitchfork trace pattern. The output impedance matching circuit includes an output pitchfork trace pattern. The circuit further discloses an input bias circuit and an output bias circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.