MFOS memory transistor & method of fabricating same

US6531324B2 · kind B2 · utility

Assignee

• Sharp Laboratories of America, Inc. · US

Inventors

• Sheng Teng Hsu · Camas, US
• Fengyan Zhang · Vancouver, US
• Tingkai Li · Vancouver, US

Key dates

• Filing date: Mar 28, 2001
• Grant date: Mar 11, 2003
• Expiry date: Mar 28, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/033

Abstract

A ferroelectric transistor gate structure with a ferroelectric gate and passivation sidewalls is provided. The passivation sidewalls serve as an insulator to reduce, or eliminate, the diffusion of oxygen or hydrogen into the ferroelectric gate. A method of forming the ferroelectric gate structure is also provided. The method comprises the steps of forming a sacrificial gate structure, removing the sacrificial gate structure, depositing passivation insulator material, etching the passivation insulator material using anisotropic plasma etching to form passivation sidewalls, depositing a ferroelectric material, polishing the ferroelectric material using CMP, and forming a top electrode overlying the ferroelectric material.