Method for manufacturing semiconductor device utilizing semiconductor testing equipment
US6531327B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 13, 2002 |
| Grant date | Mar 11, 2003 |
| Priority date | — |
| Expiry date | Feb 13, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R3/00
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method for manufacturing a semiconductor device includes forming an integrated circuit on a surface of a wafer and testing electric characteristic of the integrated circuit. The testing includes positioning each of probes of a semiconductor testing equipment and each of electrodes of a tested semiconductor element with each other, and allowing each of the probes to come into contact with each of the electrodes. The semiconductor testing equipment includes a first substrate having a cantilever, the probes being formed on the cantilever of the first substrate, and wires for electrically connecting the probes to electrode pads which are formed on an opposite side of the first substrate to a side on which the probes are formed. Each of the wires has a region arranged on an insulating layer, which is formed on the cantilever, on the opposite side.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.