Anti-spacer structure for self-aligned independent gate implantation

US6531365B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Omer H. Dokumaci · Wappingers Falls, US
• Bruce B. Doris · Brewster, US
• Peter Smeys · White Plains, US
• Isabel Yang · San Jose, US

Key dates

• Filing date: Jun 22, 2001
• Grant date: Mar 11, 2003
• Expiry date: Jun 22, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/038

Abstract

A method for improving the gate activation of metal oxide semiconductor field effect transistor (MOSFET) structures are provided. The method of the present invention includes the steps of forming a plurality of patterned gate stacks atop a layer of gate dielectric material; forming a first planarizing organic film on the gate dielectric material and abutting vertical sidewalls of the patterned gate stacks, said planarizing organic film not being present on top, horizontal surfaces of each of the patterned gate stacks; blocking some of the plurality of patterned gate stacks with a first resist, while leaving other patterned gate stacks of said plurality unblocked; implanting first ions into the unblocked patterned gate stacks; removing the first resist and first planarizing organic film and forming a second planarizing organic film and blocking the previously unblocked patterned gate stacks with a second resist; implanting second ions into the patterned gate stacks that are not blocked by said second resist; and removing the second resist and the second planarizing organic film.