Semiconductor integrated circuit with resistor and method for fabricating thereof
US6531758B2 · kind B2 · utility
8Cited by
3References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 11, 2001 |
| Grant date | Mar 11, 2003 |
| Priority date | — |
| Expiry date | Jul 11, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/00
Abstract
A resistor which have a stable resistance value and a method for fabricating the same without increasing the area of a semiconductor integrated circuit. To prevent a dishing phenomenon, the resistor is formed on the dummy gate electrode structure which have been formed in a peripheral circuit region and/or it is formed between a pair of dummy bit line structures. Regardless of a process condition the width and height of the resistor can be determined in a certain range with use of the capping layer and spacers of the dummy gate electrode structure and/or the capping layer and/or spacers of the dummy bit line structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.