Patent · US Expired

CIRCUIT CONFIGURATIONS HAVING A DELAY DEVICE, A MULTIPLIER, FILTER AND/OR A MASTER-SLAVE FLIP-FLOP FOR GENERATING: AN OUTPUT SIGNAL BEING ORTHOGONAL TO AN INPUT SIGNAL, AN OUTPUT SIGNAL HAVING A FREQUENCY BEING DOUBLE THAT OF AN INPUT SIGNAL, OR TWO OUTPUT SIGNALS BEING ORTHOGONAL TO ONE ANOTHER

US6531904B1 · kind B1 · utility

1Cited by

8References

2Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Werner Veit · Unterhaching, DE
Josef Fenk · Ottenburg, DE
Robert Grant Irvine · Greensboro, US

Key dates

Filing date	May 24, 1996
Grant date	Mar 11, 2003
Priority date	—
Expiry date	Aug 1, 2019

Classification

Technology area (CPC H)Electricity
CPC primaryH03H11/18
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A circuit configuration for generating an output signal orthogonal to an input signal includes a delay device having an input to which an input signal is applied, an output at which an output signal is available, and a control input for controlling a time lag. A multiplier device has inputs being coupled to the input and the output of the delay device and has an output. A device for low-pass filtering is connected between the output of the multiplier device and the control input of the delay device.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.