Phase-change memory bipolar array utilizing a single shallow trench isolation for creating an individual active area region for two memory array elements and one bipolar base contact
US6534781B2 · kind B2 · utility
391Cited by
22References
8Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 26, 2000 |
| Grant date | Mar 18, 2003 |
| Priority date | — |
| Expiry date | Dec 26, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8828
Abstract
The invention relates to a process of forming a phase-change memory device. The process includes forming a salicide structure in peripheral logic portion of the substrate and preventing forming salicide structures in the memory array. The device may include a double-wide trench into which a single film is deposited but two isolated lower electrodes are formed therefrom. Additionally a diode stack is formed that communicates to the lower electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.