Microelectronic device structure with metallic interlayer between substrate and die
US6534792B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | May 18, 2000 |
| Grant date | Mar 18, 2003 |
| Priority date | — |
| Expiry date | May 18, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A microelectronic device structure includes a diamond-containing substrate, and a metallic interlayer affixed to the diamond. The interlayer is made of a metal such as copper, silver, or gold, has a thickness of from about 0.003 inch to about 0.009 inch, and has an upper surface. A microelectronic device die is affixed to the upper surface of the metallic interlayer. The material of construction and thickness of the metallic interlayer are selected such that a coefficient of thermal expansion at the upper surface of the metallic interlayer is greater than a coefficient of thermal expansion of the die of the microelectronic device by up to about 3 parts per million per degree Centigrade.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.