Tunable on-chip capacity

US6535075B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Roland Frech · Esslingen am Neckar, DE
• Erich Klink · Schenefeld, DE
• Jochen Supper · Herrenberg, DE

Key dates

• Filing date: Dec 15, 2000
• Grant date: Mar 18, 2003
• Expiry date: Mar 16, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/212

Abstract

The invention relates to a tunable on-chip capacity circuit for a semiconductor chip (10) mounted on a substrate (30) and including a plurality of power supply decoupling capacitors (20-23) which can be selectively activated or deactivated by being switched on or off the power supply system. An on-chip detecting circuit (32) determines a circuit specific load/unload frequency of the on-chip power supply network, and on-chip control means (28, 33) responsive to signals of the detecting circuit increases or decreases the total of the on-chip capacity (CSD) by selectively activating or deactivating power supply decoupling capacitors (20-23). Off-chip path impedances (LMC, RMC), an off-chip capacity (CM) and the total on-chip capacity (CC), including the plurality of power supply decoupling capacitors (20-23) and parasitic on-chip capacities (CP), form a resonance loop (40) which is tunable by changing the total capacity (CSD) of the on-chip power supply decoupling capacitors. By tuning the total capacity (CSD) of the decoupling capacitors a resonance condition of the resonance loop (40) is met under which a minimum of switching power noise and a minimum switching power consumption is …