Wirebond assembly for high-speed integrated circuits
US6538336B1 · kind B1 · utility
89Cited by
8References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 14, 2000 |
| Grant date | Mar 25, 2003 |
| Priority date | — |
| Expiry date | Aug 12, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device assembly facilitates high-speed communication between an integrated-circuit die and external circuitry. The die is mounted on a wiring board that includes rows of bond sites in which the signal-bearing bond sites are separated by bond sites bearing DC voltage levels. Signal-bearing bond wires extending from the bond sites are thus separated from one another by bond wires at fixed voltage levels. This arrangement improves shielding between signal wires, thereby minimizing cross-talk and facilitating high data rates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.