Method and apparatus for lithographically printing tightly nested and isolated device features using multiple mask exposures
US6541166B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 18, 2001 |
| Grant date | Apr 1, 2003 |
| Priority date | — |
| Expiry date | Apr 15, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/31761
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present invention relates generally to a method for lithographically printing a mask pattern on a substrate, in particular a semiconductor substrate, wherein the mask pattern includes features with diverse pitches. These features may include device features such as vias or contact holes and lines in integrated circuits. The method comprises splitting the mask pattern into a plurality of masks, wherein one or more of the masks contains relatively tightly nested features and one or more of the masks contains relatively isolated features. Each of the plurality of masks is then successively exposed on a photoresist layer on the substrate. For each exposure, the exposure conditions, photoresist layer, other thin films layers, etching process, mask writing process, and/or mask pattern bias may be optimized for the tightly nested feature pattern or isolated feature pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.