Method and apparatus for a self-aligned heterojunction bipolar transistor using dielectric assisted metal liftoff process

US6541346B2 · kind B2 · utility

Inventor

• Roger Malik · Summit, US

Key dates

• Filing date: Mar 20, 2001
• Grant date: Apr 1, 2003
• Expiry date: Mar 20, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/852

Abstract

Disclosed is a manufacturing method to fabricate Heterojunction Bipolar Transistors (HBTs) that enables self-alignment of emitter and base metal contact layers with precise sub-micron spacing using a dielectric-assisted metal lift-off process. Such an HBT process relies on the formation of an “H-shaped” dielectric (i.e., Si3N4/SiO2) mask conformally deposited on top of the emitter contact metalization that is used to remove excess base metal through lift-off by a wet chemical HF-based etch. This HBT process also uses a thin selective etch-stop layer buried within the emitter layer to prevent wet chemical over-etching to the base and improves HBT reliability by forming a non-conducting, depleted ledge above the extrinsic base layer. The geometry of the self-aligned emitter and base metal contacts in the HBT insures conformal coverage of dielectric encapsulation films, preferably Si3N4 and/or SiO2, for reliable HBT emitter p-n junction passivation. Thus, the disclosed HBT process enables scaling of narrow emitter stripe widths down to sub-micron dimensions producing transistors with cut-off frequencies in the range of several hundred GigaHertz.