Fast locking CDR (clock and data recovery circuit) with high jitter tolerance and elimination of effects caused by metastability
US6545507B1 · kind B1 · utility
42Cited by
5References
13Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 26, 2001 |
| Grant date | Apr 8, 2003 |
| Priority date | — |
| Expiry date | Oct 26, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0995
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.