Frequency splitter circuit
US6545517B2 · kind B2 · utility
4Cited by
2References
7Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 6, 2001 |
| Grant date | Apr 8, 2003 |
| Priority date | — |
| Expiry date | Sep 6, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/2885
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A frequency splitter circuit includes only two differential amplifiers. A clock input signal is supplied to clock signal inputs for activating the amplifiers. A respective signal of half the frequency of the clock input signal is derivable at main and auxiliary outputs. The differential amplifiers are cross-coupled. The frequency splitter circuit is operable with low supply voltage and provides high signal amplitudes at the output, high edge steepness, and low phase noise. The frequency splitter circuit can be utilized in high-frequency receivers, for example.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.