Integrated memory having a voltage regulating circuit
US6545930B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 2001 |
| Grant date | Apr 8, 2003 |
| Priority date | — |
| Expiry date | Nov 13, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated memory has a memory cell array with row lines and column lines. A row decoder for activating row lines is connected to address lines for transferring address signals. A voltage regulating circuit serves for applying a regulatable supply voltage to one of the row lines. For the purpose of setting the supply voltage, a driving circuit is connected to the address lines and to the voltage regulating circuit. This enables trimming of the voltage regulating circuit in conjunction with a comparatively small area requirement.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.