Integrated circuit having on-chip capacitors for supplying power to portions of the circuit requiring high-transient peak power
US6546538B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 10, 2000 |
| Grant date | Apr 8, 2003 |
| Priority date | — |
| Expiry date | Mar 10, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/394
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided is an integrated circuit (IC) device that includes a semiconductor substrate on which electronic components are formed and multiple metal layers on which wires are routed. Formed on the multiple metal layers is a capacitor that includes a first plate formed on a first metal layer and a second plate formed on a second metal layer that is adjacent to the first metal layer. An area in which the first plate and the second plate overlap has a width of at least twice the width of a typical wire on the IC device. Also provided is a technique for supplying power and ground to locations on an integrated circuit (IC) device that has multiple metal layers for routing wires and a substrate for forming electronic components. Initially, the technique identifies an overlap area where two of the multiple metal layers that are adjacent to each other have open space. A plate is then formed in the overlap area of each of the two metal layers so as to construct a capacitor. Then, one plate of the capacitor is connected to power, the other plate of the capacitor is connected to ground, and the plates of the capacitor are also connected to locations on the substrate of the IC device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.