On-the-fly memory testing and automatic generation of bitmaps
US6550023B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 19, 1998 |
| Grant date | Apr 15, 2003 |
| Priority date | — |
| Expiry date | Oct 19, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/2602
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for locating defects in an on-chip memory of an integrated circuit is presented. During a memory test of on-chip memory, a known data value is written to a word in the on-chip memory, and an output data value is read back from the same addressed word in memory. A comparison of the output data value and expected data value is performed within the integrated circuit, producing a comparison result indicating which of the bit cells in the addressed word have failed. The address and comparison result are transferred external to said integrated circuit and correspond to a bitmap entry in a bitmap. The execution of a full memory test results in a complete bitmap indicating all the failed cells of the on-chip memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.