Self-aligned STI process using nitride hard mask

US6551874B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• John Pohl · Mission Viejo, US
• Nirmal Chaudhary · Austin, US
• Veit Klee · Pleasant Valley, US
• Tobias Mono · Dresden, DE
• Paul Schroeder · Austin, US

Key dates

• Filing date: Jun 22, 2001
• Grant date: Apr 22, 2003
• Expiry date: Jun 22, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/76224
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A nitride hard mask (230) is used to isolate active areas of a DRAM cell. The shallow trench isolation (STI) method includes forming memory cells comprising deep trenches (216) on a semiconductor wafer (200). The memory cell deep trenches (216) are separated from active areas (212) by a region of substrate (212). A nitride hard mask (230) is formed over the semiconductor wafer (200). The wafer (200) is patterned with the nitride hard mask (230), and the wafer (200) is etched to remove the region of substrate (212) between the deep trenches and active areas to provide shallow trench isolation. An etch chemistry selective to the nitride hard mask (230) is used.