Integrated circuit package
US6552425B1 · kind B1 · utility
14Cited by
9References
46Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 18, 1998 |
| Grant date | Apr 22, 2003 |
| Priority date | — |
| Expiry date | Dec 18, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit package is disclosed. According to one embodiment of the present invention an integrated circuit is formed in a die having an edge, and a plurality of non-I/O columns are bonded between a substrate and the die a selected distance from the edge of the die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.