Ball grid array substrate with improved traces formed from copper based metal
US6552430B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 2002 |
| Grant date | Apr 22, 2003 |
| Priority date | — |
| Expiry date | Jan 30, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A micro-BGA style package for semiconductor device comprises a semiconductor chip and a package substrate. The semiconductor chip includes a plurality of conductive pads. A plurality of transistor circuits are formed upon the semiconductor chip. The package substrate has first and second sides. A plurality of conductive terminals are formed on the first side of the package substrate. At least one of the terminals is electrically coupled to at least one of the conductive pads. A plurality of contacts are formed on the second side of the package substrate. A plurality of traces are disposed on the first side of the package substrate. Each trace provides at least part of an electrical coupling between at least one of the terminals and at least one of the contacts. The traces are formed from a copper based metal having a tensile strength of more than about 60 kg per mm2.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.