Apparatus and method to improve performance of reads from and writes to shared memory locations
US6557084B2 · kind B2 · utility
35Cited by
12References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 13, 1999 |
| Grant date | Apr 29, 2003 |
| Priority date | — |
| Expiry date | Jul 13, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0831
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to the present invention, an apparatus and method for improving reads from and writes to shared memory locations is disclosed. By giving writes priority over reads, the current invention can decrease the time associated with certain sequences of reads from and writes to shared memory locations. In particular, load-invalidate-load sequences are changed to load—load sequences with the current invention. Furthermore, contention for a shared memory location will be reduced in particular situations when using the current invention.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.