Gary Lippert
14Patents
8h-index
16Co-inventors
65Inventor score
Filing activity: Sep 18, 1997 → Jul 29, 2013
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6314491A | Peer-to-peer cache moves in a multiprocessor data processing system | Physics | 69 | Expired |
| US6557084B2 | Apparatus and method to improve performance of reads from and writes to shared memory locations | Physics | 35 | Expired |
| US7340700B2 | Method for abstraction of manufacturing test access and control ports to support automated RTL manufacturing test insertion flow for reusable modules | Physics | 31 | Expired |
| US6065098A | Method for maintaining multi-level cache coherency in a processor with non-inclusive caches and processor implementing the same | Physics | 26 | Expired |
| US8095734B2 | Managing cache line allocations for multiple issue processors | Physics | 22 | Active |
| US7157948B2 | Method and apparatus for calibrating a delay line | Electricity | 18 | Expired |
| US6351791B1 | Circuit arrangement and method of maintaining cache coherence utilizing snoop response collection logic that disregards extraneous retry responses | Physics | 15 | Expired |
| US6467032B1 | Controlled reissue delay of memory requests to reduce shared memory address contention | Physics | 14 | Expired |
| US6260117A | Method for increasing efficiency in a multi-processor system and multi-processor system with increased efficiency | Physics | 8 | Expired |
| US6823431B2 | Method for increasing efficiency in a multi-processor system and multi-processor system with increased efficiency | Physics | 5 | Expired |
| US6871267B2 | Method for increasing efficiency in a multi-processor system and multi-processor system with increased efficiency | Physics | 3 | Expired |
| US7496861B2 | Method for generalizing design attributes in a design capture environment | Physics | 1 | Active |
| US8924779B2 | Proxy responder for handling anomalies in a hardware system | Physics | 0 | Active |
| US9235521B2 | Cache system for managing various cache line conditions | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.