Apparatus and method for power continuity testing in a parallel testing system
US6559673B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 18, 2002 |
| Grant date | May 6, 2003 |
| Priority date | — |
| Expiry date | Jun 18, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/33507
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Multiple devices can be tested simultaneously for power continuity or for other power performance characteristic(s). If any of the devices have short circuit defects, for example, the fuse devices connected between these defective devices and a single power supply restrict the amount of current drawn by the defective devices. This allows power continuity testing to continue for all of the other devices. At the same time, the reduced voltage level of the defective devices, caused by the restriction of current by their corresponding fuse device, can be detected by the voltage measurement device. The reduced voltage levels allow the defective devices to be identified by a test control apparatus and to be excluded from subsequent testing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.