Electrostatic discharge (ESD) protection circuit
US6560081B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 17, 2000 |
| Grant date | May 6, 2003 |
| Priority date | — |
| Expiry date | Jul 26, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H3/006
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An ESD protection circuit that can be easily configured to provide ESD event protection against a range of ESD event voltages. The circuit is also compatible with high frequency ICs. The ESD protection circuit includes an input terminal configured to receive an ESD event signal and a diode sub-circuit. The diode sub-circuit includes at least one diode (e.g., either a single diode or a plurality of diodes connected in series or parallel configuration), a diode input node and a diode output node. The diode sub-circuit is configured to receive an ESD event signal from the input terminal and to operate under forward bias conditions to provide a diode output signal at the diode output node. The circuit also includes a bipolar junction transistor (e.g., a Si—Ge bipolar junction transistor) with a base, a collector and an emitter. The emitter is configured to receive the ESD event signal from the input terminal, while the base is configured to receive the diode output signal from the diode output node. A resistor, with a resistor input node, a resistor output node and an output terminal, is also included in the circuit. The resistor input node is electrically connected to the diode …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.