Magnetic semiconductor memory apparatus and method of manufacturing the same
US6560135B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 23, 2001 |
| Grant date | May 6, 2003 |
| Priority date | — |
| Expiry date | Aug 23, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B61/10
Abstract
Since a memory cell of a so-called MRAM utilizing a conventional tunnel magnetic resistance forms writing word lines below data lines, there are the following problems. A process becomes hard because it is necessary to execute a self-aligned contact opening process with passing through portions between the writing word lines, or since it is hard that the writing word lines sufficiently overlap with a magnetic resistance device in a planner manner due to a restriction of layout, the data writing becomes unstable. In order to solve the problems mentioned above, the present invention provides a structure of MRAM memory cell in which the writing word lines are formed above the bit lines, and a method of manufacturing the same. In accordance with the present invention, a process at a time of forming a memory cell plug becomes easy in comparison with a conventional one, there can be obtained a layout so that a magnetic field from the writing word line effectively acts on a magnetic resistance device due to the writing word line formed in an upper portion, and a stable writing can be executed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.