System and method for chemical mechanical polishing using multiple small polishing pads
US6561881B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 15, 2001 |
| Grant date | May 13, 2003 |
| Priority date | — |
| Expiry date | Mar 15, 2021 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB24B37/30
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
A system and method for chemically and mechanically polishing surfaces of semiconductor wafers utilizes multiple polishing pads having diameters that are smaller than the diameter of the wafers to simultaneously polish a given semiconductor wafer. The use of these smaller-sized polishing pads can significantly reduce the footprint of the system. Furthermore, the simultaneous polishing of the wafers by the multiple smaller-sized polishing pads can significantly increase the throughput for short period planarization. In addition, by independently controlling the lateral movement, the vertical movement and the rotational speed of each of the polishing pads during polishing, the system and method can more precisely control the amount of polishing at different regions of a wafer surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.