MIS transistor and method for making same on a semiconductor substrate
US6562687B1 · kind B1 · utility
63Cited by
7References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2001 |
| Grant date | May 13, 2003 |
| Priority date | — |
| Expiry date | Jun 28, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/605
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention relates to an MIS transistor comprising a channel region (118), source (114) and drain (116) regions arranged on either side of the channel, and a gate (150) set closely above the channel region. According to the invention, the channel has a doped central part (140), located between the source and drain regions, and separated from said source and drain regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.