Patent · US Expired

Method of manufacturing a semiconductor device comprising semiconductor elements formed in a toplayer of a silicon wafer situated on a buried insulating layer

US6562694B2 · kind B2 · utility

0Cited by
11References
6Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 21, 2000
Grant dateMay 13, 2003
Priority date
Expiry dateApr 24, 2021

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/76283
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method of manufacturing a semiconductor device including semiconductor elements having semiconductor zones (17, 18, 24, 44, 45) formed in a top layer (4) of a silicon wafer (1) situated on a buried insulating layer (2). In this method, a first series of process steps are carried out, commonly referred to as front-end processing, wherein, inter alia, the silicon wafer is heated to temperatures above 700° C. Subsequently, trenches (25) are formed in the top layer, which extend as far as the buried insulating layer and do not intersect pn-junctions. After said trenches have been filled with insulating material (26, 29), the semiconductor device is completed in a second series of process steps, commonly referred to as back-end processing, wherein the temperature of the wafer does not exceed 400° C. The trenches are filled in a deposition process wherein the wafer is heated to a temperature which does not exceed 500° C. In this manner, a semiconductor device can be made comprising semiconductor elements having very small and shallow semiconductor zones.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.