Parallel plane substrate
US6563210B2 · kind B2 · utility
6Cited by
3References
12Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 19, 2000 |
| Grant date | May 13, 2003 |
| Priority date | — |
| Expiry date | Mar 4, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/0235
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A microelectronic substrate having a plurality of alternating substantially planar layers of dielectric material and conductive material, and further having a first surface and a second surface, wherein the dielectric material and the conductive material layers extend substantially perpendicularly between the first and second surfaces.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.