Timing signal generator employing direct digital frequency synthesis
US6563350B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 2002 |
| Grant date | May 13, 2003 |
| Priority date | — |
| Expiry date | Mar 19, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03B28/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A timing signal generator including a direct digital frequency synthesizer (DDFS), a divide-by-N counter, and a pattern generator, produces a TIMING signal conveying a timed sequence of pulses. The pattern generator produces a sequence of data pairs (FREQ,N), with each pair being produced in response to each pulse of the TIMING signal and indicating a time interval that is to occur between that TIMING signal pulse and a next TIMING signal pulse. The DDFS produces an output sine wave signal (SINE) having a frequency controlled by the current FREQ data output of the pattern generator. The divide-by-N counter produces the timing signal pulses. It counts cycles of the SINE signal occurring since it last produce a TIMING signal pulse and generates a next TIMING signal when it has counted the number of SINE signal pulses indicated by the current N data output of the pattern generator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.