Weighted round robin cell architecture
US6563818B1 · kind B1 · utility
58Cited by
13References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 20, 1999 |
| Grant date | May 13, 2003 |
| Priority date | — |
| Expiry date | May 20, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5681
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A network switch configured for switching data frames across multiple ports utilizes an efficient arbiter to store the data frames. Each port possesses queuing logic for requesting a free pointer from a free buffer queue. A multi-level arbitration logic arbitrates all the requests of equal priority from the network switch ports in a round robin scheme. The arbitration logic comprises a plurality of cells that cascaded to output an acknowledgement signal in response to an inhibit signal and a request signal as well as a counter that is incremented upon an asserted acknowledgement signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.