Method of forming a self aligned trench in a semiconductor using a patterned sacrificial layer for defining the trench opening

US6566219B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Gerhard Kunkel · Radebeul, DE
• Shahid Butt · Ossining, US
• Ramachandra Divakaruni · Ossining, US
• Armin Reith · Wappingers Falls, US
• Munir D. Naeem · Poughkeepsie, US

Key dates

• Filing date: Sep 21, 2001
• Grant date: May 20, 2003
• Expiry date: Sep 21, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/488

Abstract

A method of forming a trench can be used in the fabrication of dynamic random access memory (DRAM) cells. In one aspect, a first layer of a first material (e.g., polysilicon) is formed over a semiconductor region (e.g., a silicon substrate). The first layer is patterned to remove portions of the first material. A second material (e.g., oxide) can then be deposited to fill the portions where the first material was removed. After removing the remaining portions of the first layer of first material, a trench can be etched in the semiconductor region. The trench would be substantially aligned to the second material.