Method for forming a silicide film on gate electrodes and diffusion layers of MOS transistors
US6566254B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 21, 2000 |
| Grant date | May 20, 2003 |
| Priority date | — |
| Expiry date | Jan 21, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0212
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A silicide film is selectively formed at least on diffusion layers of a MOS transistor. In the method for forming the silicide film includes, a first metal film is selectively formed at least on diffusion layers. A first annealing is applied to allow at least the diffusion layers to react with the first metal film. A part of the sidewalls is removed to form a gap with reacted film of the first metal film. A second annealing is performed at a temperature higher than that of the first annealing to form a reacted film. This makes it possible to form a silicide film having preferable electric characteristics on a gate and diffusion layers being fine in dimension and high in impurity concentration, in a self-aligning fashion without producing “bite of silicide.”
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.