Semiconductor chip package with cooling arrangement
US6567270B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 19, 2001 |
| Grant date | May 20, 2003 |
| Priority date | — |
| Expiry date | Nov 19, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/16315
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor chip package with cooling arrangement includes a heat sink adapted for covering at least a semiconductor chip, characterized in that said heat sink has an inverted U-shaped cross section thereby forming a recess at an inner bottom thereof adapted for covering at least a semiconductor chip and a plurality of pins extending downwardly from a circumferential lower edge of said heat sink, each of said pins being formed with a neck, an enlarged head, and an open slot separating said neck and said enlarged head into two portions, whereby the package can rapidly remove heat from the semiconductor chip, filter noise and reduce inductance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.