Magnetic memory device and magnetic substrate
US6567299B2 · kind B2 · utility
39Cited by
8References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 21, 2001 |
| Grant date | May 20, 2003 |
| Priority date | — |
| Expiry date | Nov 21, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A plurality of word lines (WL1) are provided in parallel to one another and a plurality of bit lines (BL1) are provided in parallel to one another, intersecting the word lines (WL1) thereabove. MRAM cells (MC2) are formed at intersections of the word lines and the bit lines therebetween. MRAM cells (MC3) are provided so that an easy axis indicated by the arrow has an angle of 45 degrees with respect to the bit lines and the word lines. Thus, an MRAM capable of cutting the power consumption in writing is achieved and further an MRAM capable of reducing the time required for erasing and writing operations is achieved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.