Method for fabricating square polysilicon spacers for a split gate flash memory device by multi-step polysilicon etch
US6569736B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 14, 2002 |
| Grant date | May 27, 2003 |
| Priority date | — |
| Expiry date | Feb 14, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/021
Abstract
A method for forming square polysilicon spacers on a split gate flash memory device by a multi-step polysilicon etch process is described. The method can be carried out by depositing a polysilicon layer on the flash memory device structure and then depositing a sacrificial layer, such as silicon oxide, on top of the polysilicon layer. The sacrificial layer has a slower etch rate than the polysilicon layer during a main etch step. The sacrificial layer overlies the flash memory device is then removed, while the sacrificial layer on the sidewall is kept intact. The polysilicon layer that overlies the flash memory device is then etched away followed by a step of removing all residual sacrificial layers. The exposed polysilicon layer is then etched to define the square polysilicon spacers on the split gate flash memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.