Stride based prefetcher with confidence counter and dynamic prefetch-ahead mechanism
US6571318B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 2, 2001 |
| Grant date | May 27, 2003 |
| Priority date | — |
| Expiry date | Jan 2, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/6026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor is described which includes a stride detect table. The stride detect table includes one or more entries, each entry used to track a potential stride pattern. Additionally, each entry includes a confidence counter. The confidence counter may be incremented each time another address in the pattern is detected, and thus may be indicative of the strength of the pattern (e.g., the likelihood of the pattern repeating). At a first threshold of the confidence counter, prefetching of the next address in the pattern (the most recent address plus the stride) may be initiated. At a second, greater threshold, a more aggressive prefetching may be initiated (e.g. the most recent address plus twice the stride). In some implementations, the prefetch mechanism including the stride detect table may replace a prefetch buffer and prefetch logic in the memory controller.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.