Shared sense amplifier for ferro-electric memory cell
US6574135B1 · kind B1 · utility
124Cited by
4References
26Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Apr 19, 2002 |
| Grant date | Jun 3, 2003 |
| Priority date | — |
| Expiry date | Apr 19, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/4013
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A ferro-electric memory device system and method is described for accessing and sensing memory cells of an FeRAM memory array with an open bit line architecture. The memory device permits the sharing of certain memory circuits such as, a sense amplifier, a data buffer, and a dummy cell between several segments of an array of FeRAM memory cells associated with a pair of bitlines of the array. Various combinations of segmented bit lines and/or segmented word lines facilitate sharing the memory circuits of the device between the array segments or multiple arrays of memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.