Semiconductor memory and its usage
US6574149B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2002 |
| Grant date | Jun 3, 2003 |
| Priority date | — |
| Expiry date | Mar 15, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory comprises a p-type silicon substrate including a first diffused layer and a second diffused layer, and a gate insulation film in which carriers are trapped in different areas. A first voltage and a second voltage are applied to the p-type silicon substrate and the gate electrode, respectively, to allow tunnel current to flow between the p-type silicon substrate and the gate electrode so that the tunnel current may eliminate the carriers trapped in the gate insulation film. This allows all the electrons captured in the central portion of the channel area to disappear, resulting in more reliable data erasure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.