Method of forming semiconductor device with LDD structure
US6576521B1 · kind B1 · utility
15Cited by
13References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 7, 1998 |
| Grant date | Jun 10, 2003 |
| Priority date | — |
| Expiry date | Apr 7, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0227
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A NMOSFET semiconductor device is formed having an LDD structure by simultaneous co-implantation of arsenic and phosphorous to form an N− layer. The co-implantation is performed subsequent to the formation of the gate structure and a thin (100 å-300 å) gate spacer but prior to the implantation of a highly doped N+ source/drain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.