System and method for unrolling loops in a trace cache
US6578138B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 1999 |
| Grant date | Jun 10, 2003 |
| Priority date | — |
| Expiry date | Dec 30, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/381
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An exemplary processor or trace cache according to the present invention includes a cache unit, which includes a data array that stores traces. The processor or trace cache also includes a control block connected to the cache unit, the control block unrolling loops when building the traces. In one exemplary method of unrolling loops, the processor or trace cache unrolls loops until the trace is a minimum length. In another exemplary embodiment, the processor or trace cache unrolls only those loops in which the head of the loop is the trace head. In a third exemplary embodiment, the processor or trace cache unrolls loops based on a predicted number of iterations of the loop when executed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.