Self-aligned, programmable phase change memory
US6579760B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 28, 2002 |
| Grant date | Jun 17, 2003 |
| Priority date | — |
| Expiry date | Mar 28, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8413
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A self-aligned, nonvolatile memory structure based upon phase change materials, including chalcogenides, can be made with a very small area on an integrated circuit. The manufacturing process results in self-aligned memory cells requiring only two array-related masks defining the bit lines and word lines. Memory cells are defined at intersections of bit lines and word lines, and have dimensions that are defined by the widths of the bit lines and word lines in a self-aligned process. The memory cells comprise structures including a selection device, a heating/barrier plate layer and a phase change memory element, vertically arranged at the intersections of the bit lines and word lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.