Patent · US Expired

Method for depositing a two-layer diffusion barrier

US6579786B2 · kind B2 · utility

4Cited by
15References
8Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 19, 2001
Grant dateJun 17, 2003
Priority date
Expiry dateNov 19, 2021

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/76843
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method for depositing a two-layer diffusion barrier on a semiconductor wafer consisting of a TaN layer and a Ta layer serving as a carrier layer for copper interconnects. The TaN layer is inventively deposited at temperatures above 200° C. in a first step, and the Ta layer is deposited in a second step while cooling the semiconductor wafer to a temperature below 50° C.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.