Multigate semiconductor device with vertical channel current and method of fabrication
US6580124B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 14, 2000 |
| Grant date | Jun 17, 2003 |
| Priority date | — |
| Expiry date | Aug 14, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5612
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention is a multibit nonvolatile memory and its method of fabrication. According to the present invention a silicon channel body having a first and second channel surface is formed. A charge storage medium is formed adjacent to the first channel surface and a second charge storage medium is formed adjacent to the second channel surface. A first control gate is formed adjacent to the first charge storage medium adjacent to the first channel surface and a second control gate is formed adjacent to the second charge storage medium adjacent to the second surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.