MATRIX SEMICONDUCTOR, INC.
144Patents
0Active
144Granted
43Portfolio score
Filing activity: Nov 16, 1998 → Apr 11, 2005
Most-cited patents
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6034882A | Vertically stacked field programmable nonvolatile memory and method of fabrication | Physics | 1,152 | Expired |
| US6420215B1 | Three-dimensional memory array and method of fabrication | Electricity | 824 | Expired |
| US6185122A | Vertically stacked field programmable nonvolatile memory and method of fabrication | Physics | 620 | Expired |
| US7005350B2 | Method for fabricating programmable memory array structures incorporating series-connected transistor strings | Electricity | 385 | Expired |
| US6580124B1 | Multigate semiconductor device with vertical channel current and method of fabrication | Physics | 380 | Expired |
| US6351406B1 | Vertically stacked field programmable nonvolatile memory and method of fabrication | Physics | 355 | Expired |
| US6881994B2 | Monolithic three dimensional array of charge storage devices containing a planarized surface | Electricity | 349 | Expired |
| US6525953B1 | Vertically-stacked, field-programmable, nonvolatile memory and method of fabrication | Physics | 324 | Expired |
| US6888750B2 | Nonvolatile memory on SOI and compound semiconductor substrates and method of fabrication | Electricity | 318 | Expired |
| US6841813B2 | TFT mask ROM and method for making same | Electricity | 308 | Expired |
| US6483736B2 | Vertically stacked field programmable nonvolatile memory and method of fabrication | Physics | 305 | Expired |
| US6677204B2 | Multigate semiconductor device with vertical channel current and method of fabrication | Physics | 303 | Expired |
| US6627530B2 | Patterning three dimensional structures | Electricity | 300 | Expired |
| US6815781B2 | Inverted staggered thin film transistor with salicided source/drain structures and method of making same | Electricity | 293 | Expired |
| US6952030B2 | High-density three-dimensional memory cell | Electricity | 240 | Expired |
| US7023739B2 | NAND memory array incorporating multiple write pulse programming of individual memory cells and method for operation of same | Physics | 233 | Expired |
| US6407953B1 | Memory array organization and related test method particularly well suited for integrated circuits having write-once memory arrays | Physics | 203 | Expired |
| US6946719B2 | Semiconductor device including junction diode contacting contact-antifuse unit comprising silicide | Electricity | 201 | Expired |
| US6653712B2 | Three-dimensional memory array and method of fabrication | Electricity | 186 | Expired |
| US6631085B2 | Three-dimensional memory array incorporating serial chain diode stack | Physics | 168 | Expired |
| US6486728B2 | Multi-stage charge pump | Electricity | 166 | Expired |
| US6515888B2 | Low cost three-dimensional memory array | Electricity | 156 | Expired |
| US6879505B2 | Word line arrangement having multi-layer word line segments for three-dimensional memory array | Physics | 154 | Expired |
| US6385074B1 | Integrated circuit structure including three-dimensional memory array | Electricity | 123 | Expired |
| US6952043B2 | Electrically isolated pillars in active devices | Electricity | 118 | Expired |
Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.