Associative memory
US6580628B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 19, 2002 |
| Grant date | Jun 17, 2003 |
| Priority date | — |
| Expiry date | Jun 19, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An associative memory comprises an array of memory cells arranged in rows and columns, each row comprising a plurality of segments each of which comprises a set of said memory cells, wherein each memory cell has compare circuitry for comparing input data with data stored therein and for generating a cell match signal when said input data matches said stored data and match signal combining circuitry for receiving a match signal from a preceding cell in the set and operable to generate a logical value dependent on the match signal of the current cell and the match signal of the preceding cell whereby each segment generates a resultant segment logical value, the memory further comprising combinatorial logic circuitry associated with each row for combining said resultant segment logical values to generate a final output match signal for that row.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.